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#2019
Re:Anyone from Zilog chiming in? 2 Years, 8 Months ago Karma: 2
Tom,

Thanks for checking this out. USB functionality is new to me but from what I can find, the USB specs state a +/-1.5% tolerance in clocking at Low Speed USB and a +/-0.25% tolerance at High Speed USB so this solution would probably be workable for a Low Speed interface.
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#2018
Re:Anyone from Zilog chiming in? 2 Years, 8 Months ago Karma: 6
I set up a development kit as you suggested and modified the USB Serial Interface Demo for the different clocks and PWM output.
Everything seems to work. I am able to input and output serial data on the USB. I did notice some variations on the PWM signal out, where it floats between about 5.98Mhz and 6.061Mhz. There are occasional spikes up to 6.135Mhz.

The DCO with the IPO (+/- 2%) stability (which is where the PWM signal is coming from) is not as accurate as a crystal and given the specific jitter requirements of the USB spec, this is probably far enough out to be out of spec for the USB signaling.

We can not support this but depending on what you are using the USB for, it may work fine.

My understanding from the designers was that this was the reason we require a crystal for the USB.
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#2017
Re:Anyone from Zilog chiming in? 2 Years, 8 Months ago Karma: 2
I have been going through the product spec for the F6482 part and as I read it, I think it is possible to have crystal-less operation of the USB. Page 97 of the product spec shows the architecture of the clock system.

The PLL which drives the USB can be clocked either by a crystal or an external clock source. The System clock (which drives the CPU, Flash and timers) can be driven by a variety of sources including the on-chip DCO. The DCO can be used for the System clock and drive one of the timers which outputs a PWM signal. This PWM signal can be routed to the External Clock In pin and hence drive the PLL (to drive the USB independent of the system clock). Frequency of the PWM signal is not important as the PLL can multiply this to get the correct USB frequency (Section 8.10). There is no loss of pin usage on the device either as using a crystal would take up two pins whereas using this method means a timer out pin is used and the external clock in pin is used, again two pins.

I would think that to run USB crystal-less, you would:

- Set up the DCO as the System Clock
- Set up Timer 0 with PWM output on pin T0OUT (T0OUT is bridged to CLKIN)
- Set up PLL to use CLKIN with the appropriate multiplier configured and use this to drive the USB block only

Tom,

Can you please confirm if this is indeed possible?
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#2002
Re:Anyone from Zilog chiming in? 2 Years, 9 Months ago Karma: 6
Jim
The core for the Z8F6482 is 1.8v and there is an internal regulator but the limit is 3.6 volts. Your points are correct for 5 volt operations.

The expensive MIC5318 regulator is only there to allow a developer to adjust the voltage from 1.8 to 3.6 volts for their development.

I will make sure your comments are noted for future consideration.
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#2001
Re:Anyone from Zilog chiming in? 2 Years, 9 Months ago Karma: 2
John Anderson wrote:
Using USB without a crystal is the whole point, Tom. That's like saying "my roof only leaks when it rains. If its a sunny day, it doesn't leak!" <Laughing>
....
We need USB, but crytal-less.
[/quote]

Now the specs are up, this gets a little worse.
Not only is there no crystal-less-USB, but the Z8F6482 also
* Lacks an on chip regulator, adding ~ 50c to the BOM (Zilog use MIC5318 in the expensive eval )
* Is not 5V tolerant on the IO pins.

Pity, as some other details looked ok, like the ADC/DAC,Comparator, Osc and BOD numbers & packages.
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#1998
Re:Anyone from Zilog chiming in? 2 Years, 9 Months ago Karma: 6
Thank you for all the comments about the Z8F6482 and the datasheet not being published. We were able to get approval to release the preliminary Z8F6482 documents.

The page for the documents are located from Applications->Zilog Technologies->Z8 Encore! XP 64K Flash

Z8F6482 Page
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